1. Field of the Invention
The present invention relates to a voltage controlled oscillator(VCO), and more particularly to an frequency control circuit for an oscillator and a method therefor.
2. Description of the Background Art
As shown in FIG. 1, a conventional oscillator circuit includes a bias unit 10 for generating a control voltage VC, and an oscillator 11 for controlling an oscillation frequency f.sub.osc of an output voltage OSC.sub.out according to the control voltage VC outputted from the bias unit 10.
The bias unit 10 includes transistors connected in an inverter type. The oscillator 11 is a ring oscillator having a plurality of delay units 11-1 to 11-n (n is an odd number) connected in a ring form. As is represented by the delay unit 11-1, each of the delay unit 11-1 to 11-n includes PMOS transistors PM1, PM2 and NMOS transistors NM2,NM1 which are connected in series between the power voltage Vdd and a ground. The PMOS transistor PM2 and the NMOS transistor NM2 constitute a complementary inverter, the gate of the PMOS transistor PM1 is connected to the ground and the gate of the NMOS transistor NM1 is applied with a control voltage VC.
The output node of the first delay unit 11-1 is connected to the input node of the second delay unit 11-2, the output node of the second delay unit 11-2 is connected to the input node of the third delay unit 11-3, and in the same manner, the outputs of the delay units 11-3 to 11 -(n-1) are respectively connected to the input nodes of the next delay units 11-4 to 11-n. The output node of the n-th delay unit 11-n is connected to the input node of the first delay unit 11-1, thereby forming a ring type connection.
The operation of the conventional oscillator circuit will now be described in detail with reference to the drawings.
When a control voltage VC is inputted from the bias circuit 10, the oscillator 11 controls the frequency f.sub.osc of the output voltage OSC.sub.out in accordance with the level of the control voltage VC. For example, assuming that the delay time of each of the delay units 11-1 to 11-n Td, the oscillation frequency f.sub.osc of the output voltage OSC.sub.out from the oscillator 11 is expressed by the following equation (1) EQU f.sub.osc =1/(Td.times.n) (1)
where n represents the number of stages of the delay units.
The delay time Td depends on the time constant T.sub.up [=C.times.(rP1+rP2)] determined by the turn-on resistances rP1, rP2 of the PMOS transistors PM1, PM2 and the parasitic capacitance C of the next stage gate capacitor or the like at the time of rise. Also, the delay time Td depends on the time constant T.sub.down [=C.times.(rN1+rN2)] determined by the turn-on resistances rN1, rN2 of the NMOS transistors NM1, NM2 and the parasitic capacitance C at the time of fall. Therefore, the delay time Td may be expressed by the following equation (2). EQU Td .varies.(T.sub.up +T.sub.down)/2 (2)
Therefore, if the control voltage VC is varied, the turn-on resistance rN1 of the NMOS transistor NM1 is varied and the delay time Td is varied, thereby making it possible to vary the oscillation frequency f.sub.osc.
FIG. 2 illustrates the oscillation characteristic of the oscillator circuit of FIG. 1. The oscillation frequency f.sub.osc can be varied by the width of .DELTA.W by changing the control voltage VC. At this time, the stability of the oscillation frequency f.sub.osc depends on the inclination of the control voltage VC- oscillation frequency f.sub.osc characteristic curve shown in FIG. 2 and the stable oscillation can be attained when the inclination is small. Thus, if the control voltage VC is increased, the oscillation frequency f.sub.osc is increased, and if the control voltage VC is decreased, the oscillation frequency f.sub.osc is decreased.
However, in the conventional oscillator, since the oscillation frequency f.sub.osc is controlled only by use of the NMOS transistor NM1, the oscillation is made unstable by the unbalance between the time constant T.sub.up and T.sub.down particularly when the the control voltage VC becomes low level and the NMOS transistor NM1 is turned off. Further, since the NMOS transistor NM1 is controlled by the control voltage VC, the variable range of the oscillation frequency f.sub.osc is determined by the control voltage VC.
Therefore, in the conventional oscillator circuit, in order to increase or decrease the control voltage VC, the size W/L of the transistor within the bias unit 10 is varied or a transistor is additionally used, thereby making it difficult to vary the oscillation frequency f.sub.osc.